encBtn(0) <= ((NOT regBtn(0) AND regBtn(1)) OR (NOT regBtn(0) AND NOT regBtn(2) AND regBtn(3)) OR (NOT regBtn(0) AND NOT regBtn(4) AND regBtn(5) AND NOT regBtn(2)) OR (NOT regBtn(0) AND NOT regBtn(4) AND NOT regBtn(2) AND NOT regBtn(6) AND regBtn(7)) OR (NOT regBtn(0) AND NOT regBtn(4) AND NOT regBtn(2) AND NOT regBtn(6) AND NOT regBtn(8))); |
FDCPE_regBtn0: FDCPE port map (regBtn(0),rgbBtnIn(0),clk,'0','0','1'); |
FDCPE_regBtn1: FDCPE port map (regBtn(1),rgbBtnIn(1),clk,'0','0','1'); |
regBtn(4).COMB <= ((cntDig(0) AND regSsg(10) AND regSsg(11) AND NOT regSsg(9)) OR (NOT cntDig(0) AND NOT regSsg(13) AND regSsg(14) AND regSsg(15)));FDCPE_regBtn4: FDCPE port map (regBtn(4),rgbBtnIn(4),clk,'0','0','1'); |
regBtn(5).COMB <= ((cntDig(0) AND NOT regSsg(10) AND NOT regSsg(11) AND NOT regSsg(9)) OR (NOT cntDig(0) AND NOT regSsg(13) AND NOT regSsg(14) AND NOT regSsg(15)));FDCPE_regBtn5: FDCPE port map (regBtn(5),rgbBtnIn(5),clk,'0','0','1'); |
FDCPE_regBtn2: FDCPE port map (regBtn(2),rgbBtnIn(2),clk,'0','0','1'); |
FDCPE_regBtn3: FDCPE port map (regBtn(3),rgbBtnIn(3),clk,'0','0','1'); |
FDCPE_regBtn6: FDCPE port map (regBtn(6),rgbBtnIn(6),clk,'0','0','1'); |
FDCPE_regBtn7: FDCPE port map (regBtn(7),rgbBtnIn(7),clk,'0','0','1'); |
FDCPE_regBtn8: FDCPE port map (regBtn(8),rgbBtnIn(8),clk,'0','0','1'); |
encBtn(1) <= ((NOT regBtn(0) AND NOT regBtn(1) AND regBtn(2)) OR (NOT regBtn(0) AND NOT regBtn(1) AND regBtn(3)) OR (NOT regBtn(0) AND NOT regBtn(1) AND NOT regBtn(4) AND NOT regBtn(5) AND regBtn(6)) OR (NOT regBtn(0) AND NOT regBtn(1) AND NOT regBtn(4) AND NOT regBtn(5) AND regBtn(7)) OR (NOT regBtn(0) AND NOT regBtn(1) AND NOT regBtn(4) AND NOT regBtn(5) AND NOT regBtn(8) AND NOT regBtn(9))); |
FDCPE_regBtn9: FDCPE port map (regBtn(9),rgbBtnIn(9),clk,'0','0','1'); |
encBtn(2) <= ((NOT regBtn(0) AND NOT regBtn(1) AND regBtn(4) AND NOT regBtn(2) AND NOT regBtn(3)) OR (NOT regBtn(0) AND NOT regBtn(1) AND regBtn(5) AND NOT regBtn(2) AND NOT regBtn(3)) OR (NOT regBtn(0) AND NOT regBtn(1) AND NOT regBtn(2) AND NOT regBtn(3) AND regBtn(6)) OR (NOT regBtn(0) AND NOT regBtn(1) AND NOT regBtn(2) AND NOT regBtn(3) AND regBtn(7)) OR (NOT regBtn(0) AND NOT regBtn(1) AND NOT regBtn(2) AND NOT regBtn(3) AND NOT regBtn(8) AND NOT regBtn(9))); |
encBtn(3) <= (NOT regBtn(0) AND NOT regBtn(1) AND NOT regBtn(4) AND NOT regBtn(5) AND NOT regBtn(2) AND NOT regBtn(3) AND NOT regBtn(6) AND NOT regBtn(7)); |
kclk <= kcin; |
kdat <= kdin; |
lcden <= ((lcen) OR (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT we AND adr(2) AND NOT cs) OR (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND adr(2) AND NOT cs AND NOT oe)); |
lcdrs <= adr(0); |
lcdrw <= we; |
FDCPE_rgbBtnOt0: FDCPE port map (rgbBtnOt(0),rgbBtnIn(10),clk,'0','0','1'); |
FDCPE_rgbBtnOt1: FDCPE port map (rgbBtnOt(1),rgbBtnIn(11),clk,'0','0','1'); |
FDCPE_rgbBtnOt2: FDCPE port map (rgbBtnOt(2),rgbBtnIn(12),clk,'0','0','1'); |
FDCPE_rgbBtnOt3: FDCPE port map (rgbBtnOt(3),rgbBtnIn(13),clk,'0','0','1'); |
FDCPE_rgbBtnOt4: FDCPE port map (rgbBtnOt(4),rgbBtnIn(14),clk,'0','0','1'); |
FDCPE_rgbBtnOt5: FDCPE port map (rgbBtnOt(5),rgbBtnIn(15),clk,'0','0','1'); |
rgbLcd_I(0) <= db(0).PIN; rgbLcd(0) <= rgbLcd_I(0) when rgbLcd_OE(0) = '1' else 'Z'; rgbLcd_OE(0) <= (NOT we AND NOT cs); |
rgbLcd_I(1) <= db(1).PIN; rgbLcd(1) <= rgbLcd_I(1) when rgbLcd_OE(1) = '1' else 'Z'; rgbLcd_OE(1) <= (NOT we AND NOT cs); |
rgbLcd_I(2) <= db(2).PIN; rgbLcd(2) <= rgbLcd_I(2) when rgbLcd_OE(2) = '1' else 'Z'; rgbLcd_OE(2) <= (NOT we AND NOT cs); |
rgbLcd_I(3) <= db(3).PIN; rgbLcd(3) <= rgbLcd_I(3) when rgbLcd_OE(3) = '1' else 'Z'; rgbLcd_OE(3) <= (NOT we AND NOT cs); |
rgbLcd_I(4) <= db(4).PIN; rgbLcd(4) <= rgbLcd_I(4) when rgbLcd_OE(4) = '1' else 'Z'; rgbLcd_OE(4) <= (NOT we AND NOT cs); |
rgbLcd_I(5) <= db(5).PIN; rgbLcd(5) <= rgbLcd_I(5) when rgbLcd_OE(5) = '1' else 'Z'; rgbLcd_OE(5) <= (NOT we AND NOT cs); |
rgbLcd_I(6) <= db(6).PIN; rgbLcd(6) <= rgbLcd_I(6) when rgbLcd_OE(6) = '1' else 'Z'; rgbLcd_OE(6) <= (NOT we AND NOT cs); |
rgbLcd_I(7) <= db(7).PIN; rgbLcd(7) <= rgbLcd_I(7) when rgbLcd_OE(7) = '1' else 'Z'; rgbLcd_OE(7) <= (NOT we AND NOT cs); |
FDCPE_rgbLed0: FDCPE port map (rgbLed(0),NOT db(0).PIN,we,'0',NOT ,rgbLed_CE(0)); rgbLed_CE(0) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND NOT adr(0) AND NOT adr(1)); |
FDCPE_rgbLed10: FDCPE port map (rgbLed(10),NOT db(2).PIN,we,'0',NOT ,rgbLed_CE(10)); rgbLed_CE(10) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND adr(0) AND NOT adr(1)); |
FDCPE_rgbLed11: FDCPE port map (rgbLed(11),NOT db(3).PIN,we,'0',NOT ,rgbLed_CE(11)); rgbLed_CE(11) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND adr(0) AND NOT adr(1)); |
FDCPE_rgbLed12: FDCPE port map (rgbLed(12),NOT db(4).PIN,we,'0',NOT ,rgbLed_CE(12)); rgbLed_CE(12) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND adr(0) AND NOT adr(1)); |
FDCPE_rgbLed13: FDCPE port map (rgbLed(13),NOT db(5).PIN,we,'0',NOT ,rgbLed_CE(13)); rgbLed_CE(13) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND adr(0) AND NOT adr(1)); |
FDCPE_rgbLed14: FDCPE port map (rgbLed(14),NOT db(6).PIN,we,'0',NOT ,rgbLed_CE(14)); rgbLed_CE(14) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND adr(0) AND NOT adr(1)); |
FDCPE_rgbLed15: FDCPE port map (rgbLed(15),NOT db(7).PIN,we,'0',NOT ,rgbLed_CE(15)); rgbLed_CE(15) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND adr(0) AND NOT adr(1)); |
FDCPE_rgbLed1: FDCPE port map (rgbLed(1),NOT db(1).PIN,we,'0',NOT ,rgbLed_CE(1)); rgbLed_CE(1) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND NOT adr(0) AND NOT adr(1)); |
FDCPE_rgbLed2: FDCPE port map (rgbLed(2),NOT db(2).PIN,we,'0',NOT ,rgbLed_CE(2)); rgbLed_CE(2) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND NOT adr(0) AND NOT adr(1)); |
FDCPE_rgbLed3: FDCPE port map (rgbLed(3),NOT db(3).PIN,we,'0',NOT ,rgbLed_CE(3)); rgbLed_CE(3) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND NOT adr(0) AND NOT adr(1)); |
FDCPE_rgbLed4: FDCPE port map (rgbLed(4),NOT db(4).PIN,we,'0',NOT ,rgbLed_CE(4)); rgbLed_CE(4) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND NOT adr(0) AND NOT adr(1)); |
FDCPE_rgbLed5: FDCPE port map (rgbLed(5),NOT db(5).PIN,we,'0',NOT ,rgbLed_CE(5)); rgbLed_CE(5) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND NOT adr(0) AND NOT adr(1)); |
FDCPE_rgbLed6: FDCPE port map (rgbLed(6),NOT db(6).PIN,we,'0',NOT ,rgbLed_CE(6)); rgbLed_CE(6) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND NOT adr(0) AND NOT adr(1)); |
FDCPE_rgbLed7: FDCPE port map (rgbLed(7),NOT db(7).PIN,we,'0',NOT ,rgbLed_CE(7)); rgbLed_CE(7) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND NOT adr(0) AND NOT adr(1)); |
FDCPE_rgbLed8: FDCPE port map (rgbLed(8),NOT db(0).PIN,we,'0',NOT ,rgbLed_CE(8)); rgbLed_CE(8) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND adr(0) AND NOT adr(1)); |
FDCPE_rgbLed9: FDCPE port map (rgbLed(9),NOT db(1).PIN,we,'0',NOT ,rgbLed_CE(9)); rgbLed_CE(9) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND adr(0) AND NOT adr(1)); |
rgbSsgAn(0) <= NOT ((NOT cntDig(0) AND NOT cntDig(1))); |
FTCPE_cntDig0: FTCPE port map (cntDig(0),'1',clk,'0','0','1'); |
FTCPE_cntDig1: FTCPE port map (cntDig(1),cntDig(0),clk,'0','0','1'); |
rgbSsgAn(1) <= NOT ((cntDig(0) AND NOT cntDig(1))); |
rgbSsgAn(2) <= NOT ((NOT cntDig(0) AND cntDig(1))); |
rgbSsgAn(3) <= NOT ((cntDig(0) AND cntDig(1))); |
rgbSsgCa(0) <= (cntDig(1) AND dig(0)) XOR ((NOT dig(0) AND N_PZ_258) OR (NOT cntDig(1) AND dig(0) AND regBtn(4).COMB) OR (NOT cntDig(1) AND dig(0) AND regBtn(5).COMB) OR (cntDig(1) AND dig(0) AND NOT N_PZ_230 AND NOT N_PZ_232 AND NOT N_PZ_302) OR (cntDig(0) AND NOT cntDig(1) AND dig(0) AND NOT regSsg(10) AND regSsg(11) AND regSsg(9)) OR (NOT cntDig(0) AND NOT cntDig(1) AND dig(0) AND regSsg(13) AND NOT regSsg(14) AND regSsg(15))); |
dig(0) <= ((cntDig(0) AND cntDig(1) AND regSsg(0)) OR (cntDig(0) AND NOT cntDig(1) AND regSsg(8)) OR (NOT cntDig(0) AND cntDig(1) AND regSsg(4)) OR (NOT cntDig(0) AND NOT cntDig(1) AND regSsg(12))); |
db(0) <= ((rgbLcd(0).PIN AND NOT N_PZ_229) OR (regBtn(0) AND NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT adr(0) AND NOT adr(1)) OR (regBtn(8) AND NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND adr(0) AND NOT adr(1)) OR (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT adr(0) AND adr(1) AND rgbSwt(0))); db(0) <= db_I(0) when db_OE(0) = '1' else 'Z'; db_OE(0) <= (NOT cs AND NOT oe);FDCPE_regSsg0: FDCPE port map (regSsg(0),db(0).PIN,we,'0','0',regSsg_CE(0)); regSsg_CE(0) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND NOT adr(0) AND adr(1)); |
FDCPE_regSsg4: FDCPE port map (regSsg(4),db(4).PIN,we,'0','0',regSsg_CE(4)); regSsg_CE(4) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND NOT adr(0) AND adr(1)); |
FDCPE_regSsg8: FDCPE port map (regSsg(8),db(0).PIN,we,'0','0',regSsg_CE(8)); regSsg_CE(8) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND adr(0) AND adr(1)); |
db(4) <= ((NOT N_PZ_229 AND rgbLcd(4).PIN) OR (regBtn(4) AND NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT adr(0) AND NOT adr(1)) OR (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND adr(0) AND NOT adr(1) AND rgbBtnOt(2)) OR (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT adr(0) AND adr(1) AND rgbSwt(4))); db(4) <= db_I(4) when db_OE(4) = '1' else 'Z'; db_OE(4) <= (NOT cs AND NOT oe);FDCPE_regSsg12: FDCPE port map (regSsg(12),db(4).PIN,we,'0','0',regSsg_CE(12)); regSsg_CE(12) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND adr(0) AND adr(1)); |
db(2) <= ((NOT N_PZ_229 AND rgbLcd(2).PIN) OR (regBtn(2) AND NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT adr(0) AND NOT adr(1)) OR (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND adr(0) AND NOT adr(1) AND rgbBtnOt(0)) OR (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT adr(0) AND adr(1) AND rgbSwt(2))); db(2) <= db_I(2) when db_OE(2) = '1' else 'Z'; db_OE(2) <= (NOT cs AND NOT oe);FDCPE_regSsg10: FDCPE port map (regSsg(10),db(2).PIN,we,'0','0',regSsg_CE(10)); regSsg_CE(10) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND adr(0) AND adr(1)); |
db(3) <= ((NOT N_PZ_229 AND rgbLcd(3).PIN) OR (regBtn(3) AND NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT adr(0) AND NOT adr(1)) OR (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND adr(0) AND NOT adr(1) AND rgbBtnOt(1)) OR (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT adr(0) AND adr(1) AND rgbSwt(3))); db(3) <= db_I(3) when db_OE(3) = '1' else 'Z'; db_OE(3) <= (NOT cs AND NOT oe);FDCPE_regSsg11: FDCPE port map (regSsg(11),db(3).PIN,we,'0','0',regSsg_CE(11)); regSsg_CE(11) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND adr(0) AND adr(1)); |
FDCPE_regSsg9: FDCPE port map (regSsg(9),db(1).PIN,we,'0','0',regSsg_CE(9)); regSsg_CE(9) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND adr(0) AND adr(1)); |
db(5) <= ((NOT N_PZ_229 AND rgbLcd(5).PIN) OR (regBtn(5) AND NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT adr(0) AND NOT adr(1)) OR (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND adr(0) AND NOT adr(1) AND rgbBtnOt(3)) OR (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT adr(0) AND adr(1) AND rgbSwt(5))); db(5) <= db_I(5) when db_OE(5) = '1' else 'Z'; db_OE(5) <= (NOT cs AND NOT oe);FDCPE_regSsg13: FDCPE port map (regSsg(13),db(5).PIN,we,'0','0',regSsg_CE(13)); regSsg_CE(13) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND adr(0) AND adr(1)); |
db(6) <= ((NOT N_PZ_229 AND rgbLcd(6).PIN) OR (regBtn(6) AND NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT adr(0) AND NOT adr(1)) OR (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND adr(0) AND NOT adr(1) AND rgbBtnOt(4)) OR (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT adr(0) AND adr(1) AND rgbSwt(6))); db(6) <= db_I(6) when db_OE(6) = '1' else 'Z'; db_OE(6) <= (NOT cs AND NOT oe);FDCPE_regSsg14: FDCPE port map (regSsg(14),db(6).PIN,we,'0','0',regSsg_CE(14)); regSsg_CE(14) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND adr(0) AND adr(1)); |
db(7) <= ((NOT N_PZ_229 AND rgbLcd(7).PIN) OR (regBtn(7) AND NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT adr(0) AND NOT adr(1)) OR (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND adr(0) AND NOT adr(1) AND rgbBtnOt(5)) OR (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT adr(0) AND adr(1) AND rgbSwt(7))); db(7) <= db_I(7) when db_OE(7) = '1' else 'Z'; db_OE(7) <= (NOT cs AND NOT oe);FDCPE_regSsg15: FDCPE port map (regSsg(15),db(7).PIN,we,'0','0',regSsg_CE(15)); regSsg_CE(15) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND adr(0) AND adr(1)); |
N_PZ_258 <= ((cntDig(0) AND cntDig(1) AND NOT regSsg(1) AND regSsg(2) AND NOT regSsg(3)) OR (cntDig(0) AND NOT cntDig(1) AND regSsg(10) AND NOT regSsg(11) AND NOT regSsg(9)) OR (NOT cntDig(0) AND cntDig(1) AND NOT regSsg(5) AND regSsg(6) AND NOT regSsg(7)) OR (NOT cntDig(0) AND NOT cntDig(1) AND NOT regSsg(13) AND regSsg(14) AND NOT regSsg(15))); |
db(1) <= ((NOT N_PZ_229 AND rgbLcd(1).PIN) OR (regBtn(1) AND NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT adr(0) AND NOT adr(1)) OR (regBtn(9) AND NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND adr(0) AND NOT adr(1)) OR (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT adr(0) AND adr(1) AND rgbSwt(1))); db(1) <= db_I(1) when db_OE(1) = '1' else 'Z'; db_OE(1) <= (NOT cs AND NOT oe);FDCPE_regSsg1: FDCPE port map (regSsg(1),db(1).PIN,we,'0','0',regSsg_CE(1)); regSsg_CE(1) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND NOT adr(0) AND adr(1)); |
FDCPE_regSsg2: FDCPE port map (regSsg(2),db(2).PIN,we,'0','0',regSsg_CE(2)); regSsg_CE(2) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND NOT adr(0) AND adr(1)); |
FDCPE_regSsg3: FDCPE port map (regSsg(3),db(3).PIN,we,'0','0',regSsg_CE(3)); regSsg_CE(3) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND NOT adr(0) AND adr(1)); |
FDCPE_regSsg5: FDCPE port map (regSsg(5),db(5).PIN,we,'0','0',regSsg_CE(5)); regSsg_CE(5) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND NOT adr(0) AND adr(1)); |
FDCPE_regSsg6: FDCPE port map (regSsg(6),db(6).PIN,we,'0','0',regSsg_CE(6)); regSsg_CE(6) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND NOT adr(0) AND adr(1)); |
FDCPE_regSsg7: FDCPE port map (regSsg(7),db(7).PIN,we,'0','0',regSsg_CE(7)); regSsg_CE(7) <= (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT cs AND NOT adr(0) AND adr(1)); |
N_PZ_230 <= ((cntDig(0) AND NOT regSsg(1) AND regSsg(2) AND regSsg(3)) OR (NOT cntDig(0) AND NOT regSsg(5) AND regSsg(6) AND regSsg(7))); |
N_PZ_232 <= ((cntDig(0) AND NOT regSsg(1) AND NOT regSsg(2) AND NOT regSsg(3)) OR (NOT cntDig(0) AND NOT regSsg(5) AND NOT regSsg(6) AND NOT regSsg(7))); |
N_PZ_302 <= ((cntDig(0) AND regSsg(1) AND NOT regSsg(2) AND regSsg(3)) OR (NOT cntDig(0) AND regSsg(5) AND NOT regSsg(6) AND regSsg(7))); |
rgbSsgCa(1) <= ((dig(0) AND N_PZ_258) OR (NOT dig(0) AND N_PZ_264) OR (cntDig(0) AND NOT cntDig(1) AND NOT dig(0) AND N_PZ_335) OR (NOT cntDig(0) AND cntDig(1) AND NOT dig(0) AND N_PZ_283) OR (cntDig(0) AND cntDig(1) AND dig(0) AND regSsg(1) AND regSsg(3)) OR (cntDig(0) AND cntDig(1) AND NOT dig(0) AND regSsg(1) AND regSsg(2)) OR (cntDig(0) AND NOT cntDig(1) AND dig(0) AND regSsg(11) AND regSsg(9)) OR (NOT cntDig(0) AND cntDig(1) AND dig(0) AND regSsg(5) AND regSsg(7)) OR (NOT cntDig(0) AND NOT cntDig(1) AND dig(0) AND regSsg(13) AND regSsg(15)) OR (NOT cntDig(0) AND NOT cntDig(1) AND NOT dig(0) AND regSsg(13) AND regSsg(14))); |
N_PZ_264 <= ((cntDig(0) AND cntDig(1) AND regSsg(2) AND regSsg(3)) OR (cntDig(0) AND NOT cntDig(1) AND regSsg(10) AND regSsg(11)) OR (NOT cntDig(0) AND cntDig(1) AND regSsg(6) AND regSsg(7)) OR (NOT cntDig(0) AND NOT cntDig(1) AND regSsg(14) AND regSsg(15))); |
N_PZ_283 <= (regSsg(5) AND regSsg(6)); |
N_PZ_335 <= (regSsg(10) AND regSsg(9)); |
rgbSsgCa(2) <= ((NOT dig(0) AND N_PZ_264) OR (NOT dig(0) AND N_PZ_267) OR (cntDig(0) AND NOT cntDig(1) AND regSsg(11) AND N_PZ_335) OR (NOT cntDig(0) AND cntDig(1) AND regSsg(7) AND N_PZ_283) OR (cntDig(0) AND cntDig(1) AND regSsg(1) AND regSsg(2) AND regSsg(3)) OR (NOT cntDig(0) AND NOT cntDig(1) AND regSsg(13) AND regSsg(14) AND regSsg(15))); |
N_PZ_267 <= ((cntDig(0) AND cntDig(1) AND regSsg(1) AND NOT regSsg(2) AND NOT regSsg(3)) OR (cntDig(0) AND NOT cntDig(1) AND NOT regSsg(10) AND NOT regSsg(11) AND regSsg(9)) OR (NOT cntDig(0) AND cntDig(1) AND regSsg(5) AND NOT regSsg(6) AND NOT regSsg(7)) OR (NOT cntDig(0) AND NOT cntDig(1) AND regSsg(13) AND NOT regSsg(14) AND NOT regSsg(15))); |
rgbSsgCa(3) <= ((NOT dig(0) AND N_PZ_258) OR (cntDig(1) AND dig(0) AND N_PZ_232) OR (cntDig(1) AND NOT dig(0) AND N_PZ_302) OR (NOT cntDig(1) AND dig(0) AND regBtn(5).COMB) OR (cntDig(0) AND NOT cntDig(1) AND dig(0) AND N_PZ_335) OR (NOT cntDig(0) AND cntDig(1) AND dig(0) AND N_PZ_283) OR (cntDig(0) AND cntDig(1) AND dig(0) AND regSsg(1) AND regSsg(2)) OR (NOT cntDig(0) AND NOT cntDig(1) AND dig(0) AND regSsg(13) AND regSsg(14)) OR (cntDig(0) AND NOT cntDig(1) AND NOT dig(0) AND NOT regSsg(10) AND regSsg(11) AND regSsg(9)) OR (NOT cntDig(0) AND NOT cntDig(1) AND NOT dig(0) AND regSsg(13) AND NOT regSsg(14) AND regSsg(15))); |
rgbSsgCa(4) <= ((N_PZ_258) OR (cntDig(0) AND cntDig(1) AND dig(0) AND NOT regSsg(3)) OR (cntDig(0) AND NOT cntDig(1) AND dig(0) AND NOT regSsg(11)) OR (NOT cntDig(0) AND cntDig(1) AND dig(0) AND NOT regSsg(7)) OR (NOT cntDig(0) AND NOT cntDig(1) AND dig(0) AND NOT regSsg(15)) OR (cntDig(0) AND cntDig(1) AND dig(0) AND NOT regSsg(1) AND NOT regSsg(2)) OR (cntDig(0) AND NOT cntDig(1) AND dig(0) AND NOT regSsg(10) AND NOT regSsg(9)) OR (NOT cntDig(0) AND cntDig(1) AND dig(0) AND NOT regSsg(5) AND NOT regSsg(6)) OR (NOT cntDig(0) AND NOT cntDig(1) AND dig(0) AND NOT regSsg(13) AND NOT regSsg(14))); |
rgbSsgCa(5) <= NOT (((NOT dig(0) AND NOT N_PZ_267) OR (cntDig(0) AND cntDig(1) AND regSsg(3) AND NOT N_PZ_230 AND NOT N_PZ_267) OR (NOT cntDig(0) AND cntDig(1) AND regSsg(7) AND NOT N_PZ_230 AND NOT N_PZ_267) OR (cntDig(0) AND cntDig(1) AND NOT regSsg(1) AND regSsg(2) AND NOT N_PZ_230 AND NOT N_PZ_267) OR (cntDig(0) AND NOT cntDig(1) AND regSsg(11) AND NOT regBtn(4).COMB AND NOT regBtn(5).COMB AND NOT N_PZ_267) OR (cntDig(0) AND NOT cntDig(1) AND NOT regSsg(9) AND NOT regBtn(4).COMB AND NOT regBtn(5).COMB AND NOT N_PZ_267) OR (NOT cntDig(0) AND cntDig(1) AND regSsg(6) AND NOT N_PZ_230 AND NOT N_PZ_283 AND NOT N_PZ_267) OR (NOT cntDig(0) AND NOT cntDig(1) AND NOT regSsg(13) AND NOT regBtn(4).COMB AND NOT regBtn(5).COMB AND NOT N_PZ_267) OR (NOT cntDig(0) AND NOT cntDig(1) AND regSsg(15) AND NOT regBtn(4).COMB AND NOT regBtn(5).COMB AND NOT N_PZ_267))); |
rgbSsgCa(6) <= ((cntDig(1) AND N_PZ_232) OR (NOT cntDig(1) AND regBtn(5).COMB) OR (cntDig(1) AND NOT dig(0) AND N_PZ_230) OR (NOT cntDig(1) AND NOT dig(0) AND regBtn(4).COMB) OR (cntDig(0) AND NOT cntDig(1) AND dig(0) AND NOT regSsg(11) AND N_PZ_335) OR (NOT cntDig(0) AND cntDig(1) AND dig(0) AND NOT regSsg(7) AND N_PZ_283) OR (cntDig(0) AND cntDig(1) AND dig(0) AND regSsg(1) AND regSsg(2) AND NOT regSsg(3)) OR (NOT cntDig(0) AND NOT cntDig(1) AND dig(0) AND regSsg(13) AND regSsg(14) AND NOT regSsg(15))); |
rgbSsgCa(7) <= '1'; |
N_PZ_229 <= ((NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT adr(0)) OR (NOT adr(5) AND NOT adr(4) AND NOT adr(3) AND NOT adr(2) AND NOT adr(1))); |
Register Legend: FDCPE (Q,D,C,CLR,PRE,CE); FTCPE (Q,D,C,CLR,PRE,CE); LDCP (Q,D,G,CLR,PRE); |